Course Overview
Understanding Signal Integrity is a key skill for every hardware and PCB layout engineer. This 3-day course provides engineers with the Signal Integrity knowledge and skills they need to design modern electronic systems.
The skills learned in this course allow engineers to design both digital and mixed-signal PCBs with confidence. Engineers employing these skills may benefit from fewer board revisions, improved system performance, fewer EMC issues and reduced time to market.
The course is scheduled to run on the following dates:
- Edinburgh, Scotland, UK – August 2018
- Limerick, Ireland – August 2018
Please contact us for further information or to book a place on one of the upcoming course dates.
Who Should Attend
- Hardware Engineers
- PCB Layout Engineers
- Engineers that participate in PCB Layout Reviews
- Engineers wishing to learn Signal Integrity design techniques
- Engineers wishing to resolve Signal Integrity and EMC issues
What You Will Learn
- Principles of Signal Integrity
- Principles of Power Integrity
- Practical Design Techniques
Prerequisites
- A working knowledge of electronic hardware design is required.
- Knowledge of electromagnetic theory would be beneficial but is not necessary.
Course Duration
Three Days.
Course Outline
Day 1
Introduction
What is Signal Integrity? • What is Power Integrity? • Classification of Signal Integrity Problems • Signal Integrity and EMC/EMI
Properties of Electrical Systems
Voltage • Current • Resistance • Capacitance • Inductance • Impedance • Path of Least Impedance • Bandwidth • Lumped versus Distributed Systems • Spectral Content of Digital Signals • Bandwidth and Rise Time • Knee Frequency
PCB Fabrication
Elements of a PCB • Copper • Laminate • Prepreg • Vias • Design Rules
PCB Stack-Up
Definition • Design Principles • Signal Return Paths • Classic PCB Stack-Ups
Transmission Lines
Ideal Transmission Lines • Propagation Delay • Characteristic Impedance • Popular Transmission Line Configurations • Lossy Transmission Lines • Performance Regions
Day 2
Reflections
Consequences of Reflections • Effects of Source and Load Impedance • Reflections at Impedance Changes • Controlling Reflections
Termination Techniques
When to Terminate • End Termination • Source Termination • Termination Strategies • Rise Time Implications • Power Dissipation
Crosstalk
Coupling Mechanisms • Common Path Noise • Inductive Coupling • Capacitive Coupling • Reference Plane Splits • Near-End Crosstalk • Far-End Crosstalk • Guard Traces • Connector Crosstalk
Integrated Circuits
Package Types • Lead Inductance • Ground Bounce • Synchronous Switching Noise (SSN) • Input Buffers • Output Drivers • On-Die Termination (ODT) • IBIS Simulations
Differential Signalling
Differential Pairs • Advantages • Return Current Distribution • Differential Impedance • Common Impedance • Termination Techniques
Day 3
Power Distribution Networks (PDNs)
Power Distribution • Voltage Reference Distribution • Frequencies of Interest • Target PDN Impedance • Multi-Layered PDN Model • Planes • Bypass Capacitors • PDN Design Methodology
Bypass Capacitors
Capacitor Types • Ceramic Capacitors • Electrolytic Capacitors • Planar Capacitance • Equivalent Series Resistance • Equivalent Series Inductance • Placement • PCB Layout
Grounding Strategies
What is “Ground”? • Ground Plane Topologies • Single versus Split Ground Planes • Ground Loops
Course Dates and Locations
The Signal Integrity Fundamentals training course is scheduled to run on the following dates:
- Edinburgh, Scotland, UK – August 2018
- Limerick, Ireland – August 2018
Please contact us to book a place on one of the upcoming courses.
On-site, team-based training is also available on request.
Price
Please contact us for pricing information. Discounts are available for early-bird registrations and team bookings.